1. Technical Field
The present invention relates to a semiconductor device, a method for driving a semiconductor device, and an electronic apparatus.
2. Related Art
Recently, in semiconductor fields, techniques have been increasingly developed that form devices to a semiconductor layer (hereinafter referred to as an active layer) on a substrate surface such as a silicon on insulator (SOI). The devices formed on the SOI substrate have possibility of being operated at low voltage, high speed, and low power consumption.
One of the examples of the SOI substrates is a SOI substrate formed by a separation by implanted oxygen (SIMOX) method or a bonding method in which two Si substrates are bonded with an oxide film interposed therebetween. In addition, a technique is known in which the SOI structure is provided by using a separation by bonding silicon island (SBSI) method. In the SBSI method, the SOI structure can be formed to a desired region by typical complementary meta-oxide semiconductor (CMOS) processes instead of providing the SOI structure entirely to a substrate. Such technique is shown in “T. Sakai et al., Second International SiGe Technology and Device Meeting, Meeting Abstract, pp. 230-231, May 2004”.
Further, a method is known in which a SiGe layer is formed under an active layer of a SOI substrate, and then a Si layer is overlapped on the SiGe layer and grown to generate strain due to a difference in lattice constants between the SiGe and Si layers. The method is disclosed in JP-A-2007-194336. A technique is also known in which stress is given to a Si crystalline layer serving as an active layer with this strain so as to enhance performances of a CMOS transistor using the Si crystalline layer as a channel.
The method generating stress by using a difference in lattice constants can control the mobility of an active layer by applying strain to the active layer of the SOI substrate, but hardly improves the operation speed of a CMOS transistor, because a strain applying direction differs in a P-channel MOS (PMOS) transistor in which holes play a role in conduction and an N-channel-MOS (NMOS) transistor in which electrons play a role in conduction. In addition, in order to satisfy a high-speed operation and low power consumption simultaneously, it is necessary to enable the following two states to be realized: a high-speed operation in an active state and a low leakage current operation in an idle state. That is, the CMOS transistor needs to operate at high speed and low power consumption. It is difficult for the method applying a constant stress to satisfy the two conditions.